Device connection standards

The following main buses are used to connect internal and external devices to the motherboard:

· AGP bus;

· USB bus;

· IEEE 1394 bus (FireWire);

Devices external memory connect to the computer using IDE (ATA), SATA and eSATA interfaces.

SCSI Interfaces and SAS are also used to connect external memory devices, but other devices can be connected to them.

To wirelessly connect devices to a computer, you can also use wireless ports: IrDA and Bluetooth.

The Ethernet port can be used both to connect certain types of devices to a computer, and to connect a computer to an Ethernet telecommunications network.

Wireless connection You can also connect devices to your computer using the Wi-Fi port. This port also allows you to connect your computer to wireless network Wi-Fi.

Some computer interfaces and ports are obsolete, although they are still included in the motherboard. This

· FDD interface;

· parallel port;

· serial port;

· PS/2 port;

· game port.

Despite the high speed of the PCI bus, its capabilities become insufficient in conditions of increasing load on the video system (video card and monitor), since the implementation of three-dimensional graphics and video requires the transfer of large amounts of data between the monitor, processor and RAM. Therefore, in 1997, Intel developed a standard for the AGP bus (Accelerated Graphics Port) - a data transfer channel between a video card and RAM based on the PCI standard. This standard is designed to increase computer performance when processing three-dimensional images without installing specialized expensive video cards.

Since the AGP bus is 32-bit and its clock frequency is equal to the system bus clock frequency (66 MHz), then standard mode Its throughput of 266 MB/s is twice that of the PCI bus.

To increase the bus throughput, the AGP2X mode (AGP 1.0 specification) was developed, in which data is transferred twice as fast (532 MB/s). This is achieved through the ability to control data reading/writing based on the edges and falls of clock pulses, which allows you to transfer two blocks of data in one clock cycle of the AGP bus.

In 1998, Intel developed a new specification (AGP 2.0) of the AGP standard - AGP4X. The implementation of transferring four data blocks in one clock cycle led to an increase in transfer speed to 1 GB/s.

A further development of the AGP standard is the AGP8X mode (AGP 3.0 specification, adopted in 2002), in which the transfer speed increased to 2 GB/s by transmitting eight data blocks per clock cycle.

The AGP8X connector is shown in Fig. ????.

Rice. ?????. AGP8X connector

One of the main features of the AGP standard is the ability to share RAM between central processor and video adapter, i.e. 3D image processing is performed in random access memory both the central processor and the processor in the video adapter.

Intel has now discontinued support for the AGP bus, which is being gradually replaced. PCI bus Express, although AGP motherboards and video cards are still being released.

PCI and AGP standards

PCI bus

The VLB card had barely gained a foothold in the market when, in June 1992, Intel produced a new bus - the PCI bus ( Peripheral Component Interconnect). It is this “peripheral connection component” that is found in most modern computers, becoming the de facto standard for the bus industry of our time.

The bus developers set out to create a fundamentally new interface that would not be an improvement on other technologies (such as EISA), would not be platform dependent (that is, could work with future generations of processors), would have high performance, and would be cheap to manufacture. Well, if Intel got down to business, then there was no doubt that the goal would be achieved. Thanks to the refusal to use the processor bus, the PCI bus was not only processor-independent, but could also work independently, without turning to the latter with requests. For example, the processor may be working on memory while the PCI bus is transferring data. The fundamental principle of the PCI bus is the use of so-called bridges ( Bridges), which communicate the bus with other system components (for example, PCI to ISA Bridge). Another feature is the implementation of the so-called principles Bus Master And Bus Slave. For example, a PCI-Master card can both read data from RAM and write it there without accessing the processor. A PCI-Slave card (for example, a graphics controller), as you probably already guessed, can only read data.


What is the secret of such a wide prevalence of this bus in today's world of personal computers?

  • Synchronous 32-bit or 64-bit data exchange (however, as far as I know, the 64-bit bus is currently used only in Alpha systems and servers based on Intel processors Xeon, but, in principle, it is the future). In this case, to reduce the number of contacts (and cost), multiplexing is used, that is, the address and data are transmitted over the same lines
  • The bus supports a data transfer method called linear burst(linear packet method). This method assumes that a packet of information is read (or written) in one piece, that is, the address is automatically incremented for the next byte. Naturally, this increases the speed of data transfer itself by reducing the number of transmitted addresses
  • The PCI bus uses a completely different data transfer method from ISA. This method, called the handshake method ( handshake), is that two devices are defined in the system: transmitting ( Initiator) and receiving ( Target). When the transmitting device is ready to transmit, it puts data on the data line and accompanies it with the appropriate signal ( Initiator Ready), while the receiving device writes them (data) into its registers and sends a signal Target Ready, confirming the recording of data and readiness to receive the following. All signals are set strictly in accordance with the bus clock pulses
  • Relative independence of individual system components. In accordance with the PCI concept, the transmission of a data packet is controlled not by the CPU, but by a bridge connected between it and the PCI bus ( Host Bridge Cashe/DRAM Controller). The processor can continue to operate while data is being exchanged with RAM. The same thing happens when exchanging data between two other components of the system.
  • Low CPU load. This feature follows from the previous one
  • Bus frequencies of 33 MHz or 66 MHz allow for a wide range of throughputs (using burst mode):
    • 132 MV/sec at 32-bit/33 MHz
    • 264 MB/sec at 32-bit/66 MHz
    • 264 MB/sec at 64-bit/33 MHz
    • 528 MV/sec at 64-bit/66 MHz

    At the same time, for the bus to operate at a frequency of 66 MHz, it is necessary that all peripherals worked on this frequency

  • Since the processor bus and PCI expansion bus are connected using a main bridge ( Host Bridge), then the latter can work with CPUs of subsequent generations
  • Full support multiply bus master(for example, multiple controllers hard drives can simultaneously work on the bus)
  • Supports 5V and 3.3V logic. Connectors for 5 and 3.3V boards differ in the location of the keys

    There are also universal boards that support both voltages. Note that 66 MHz is only supported by 3.3 V logic

  • Support write-back And write-through cache
  • PCI is designed to recognize hardware and analyze system configuration in accordance with the Plug&Play standard developed by Intel Corporation. The PCI bus specification defines three types of resources: two common ones (memory range and I/O range, as they are called Microsoft company) And configuration space- configuration space. It consists of three regions:
    • Device independent header ( device-independent header region)
    • Region determined by device type ( header-type region)
    • user defined region ( user-defined region)

    The header contains information about the manufacturer and type of device - field Class Code(network adapter, disk controller, multimedia, etc.) and other service information.

    The next region contains the memory and I/O range registers, which allow a device to be dynamically allocated a region of system memory and address space. Depending on the system implementation, device configuration is performed either by the BIOS (when performing POST - Power On-Self Test), or programmatically. The expansion ROM base register similarly allows device ROM to be mapped to system memory. CIS field ( Card Information Structure) pointer is used by maps cardbus(PCMCIA). The last 4 bytes of the region are used to determine the interrupt and request/ownership time

  • The bus specification allows you to combine up to eight functions on one card (for example, video + audio, etc.)
  • The bus allows you to install up to 4 expansion slots, but it is possible to use a PCI to PCI bridge to increase their number
  • PCI devices are equipped with a timer that is used to determine the maximum amount of time a device can occupy the bus.
  • When developing the bus, its architecture included advanced technical solutions allowing the tire to be used in the future and upgraded

32-bit pin assignments PCI slot(33 MHz)

Conclusion Signal (solder side) Signal (mounting side) Conclusion Signal (solder side) Signal (mounting side)
1 TRST# -12 V 48 GND AD10
2 +12 V TCK 49 AD09 GND
3 TMS GND 50 GND/5V GND/5V
4 TDI TDO 51 GND/5V GND/5V
5 +5 V +5 V 52 C/BE0 AD08
6 INTA# +5 V 53 +3.3 V AD07
7 INTC# INTB# 54 AD06 +3.3 V
8 +5 V INTD# 55 AD04 AD05
9 Reserved PRSNT1# 56 GND AD03
10 +5 V Reserved 57 AD02 GND
11 Reserved PRNST2# 58 AD00 AD01
12 GND/3.3V GND/3.3V 59 +5 V +5 V
13 GND/3.3V GND/3.3V 60 REQ64# ACK64#
14 Reserved Reserved 61 +5 V +5 V
15 RST# GND 62 +5 V +5 V
16 +5 V CLK 63 GND Reserved
17 GNT# GND 64 C/BE7# GND
18 GND REQ# 65 C/BE5# C/BE6#
19 Reserved +5 V 66 +5 V C/BE4#
20 AD30 AD31 67 PAR64 GND
21 +3.3 V AD29 68 AD62 A63
22 AD28 GND 69 GND A61
23 AD26 AD27 70 AD60 +5 V
24 GND AD25 71 AD58 AD59
25 AD24 +3.3 V 72 GND AD57
26 ISDEL C/BE3# 73 AD56 GND
27 +3.3 V AD23 74 AD54 AD55
28 AD22 GND 75 +5 V AD53
29 AD20 AD21 76 AD52 GND
30 GND AD19 77 AD50 AD51
31 AD18 +3.3 V 78 GND AD49
32 AD16 AD17 79 AD48 GND
33 +3.3 V C/BE2# 80 AD46 AD47
34 FRAME# GND 81 GND AD45
35 GND IRDY# 82 AD44 GND
36 TRDY# +3.3 V 83 AD42 AD43
37 GND DEVSEL# 84 +5 V AD41
38 STOP# GND 85 AD40 GND
39 +3.3 V LOCK# 86 AD38 AD39
40 SDONE PERR# 87 GND AD37
41 SBO# +3.3 V 88 AD36 +5 V
42 GND SERR# 89 AD34 AD35
43 PAR +3.3 V 90 GND AD33
44 AD15 C/BE1# 91 AD32 GND
45 +3.3 V AD14 92 Reserved Reserved
46 AD13 GND 93 GND Reserved
47 AD11 AD12 94 Reserved GND

Currently the PCI bus is 32-bit, running at 33 MHz, the slowest bus specification. But today the resulting 132 Mb/s is beginning to be insufficient (by the way, in terms of speed indicators, PCI is now hanging at the edge of the system, just as ISA once was). It is therefore logical that in the near future more speed standards PCI. Most likely, it will be a 33 MHz 64-bit bus, since not all cards designed to work at 33 MHz will be able to work at 66. The fact that some new standard will appear, claiming to take the place of the current bus in our computers, is unlikely, firstly, because PCI has become very popular over the years, and few people will want to give up those PCI devices that have already been released and are being produced in enormous quantities and, secondly, because Intel is unlikely to allow the appearance of a competitor on the market (unless, of course, the initiative does not come from Intel itself, but this is unlikely). In general, let's live a little longer and see, but now let's not make any hasty predictions.

AGP bus

3D graphics, which have recently become widespread, as well as the ever-increasing load on PCI from various hard drives, network cards and other high-speed devices, have led to the fact that the local bus bandwidth to satisfy all these requirements has clearly begun to be insufficient. It would seem that here is the simplest solution for you: switch to the 66 MHz 64-bit PCI bus, but no. Intel, based on the same PCI R2.1 standard, is developing a new bus - AGP (1.0, then 2.0), which differs from its parent in the following:

  • The bus is capable of transmitting two data blocks in one 66 MHz cycle (AGP 2x)
  • Multiplexing of address and data lines has been eliminated (let me remind you that in PCI, to reduce the cost of design, the address and data were transmitted over the same lines)
  • further pipelining of read/write operations, according to the developers, eliminates the impact of delays in memory modules on the speed of these operations

As a result, the bus bandwidth was rated at 500 MB/sec, and it was intended to allow graphics cards to store the data they need (textures) not only in their expensive local memory installed on board, but also in the cheap system memory of the computer. At the same time, they (the cards) could have a smaller amount of this local memory and, accordingly, cost less.


Fundamentally, AGP is a second PCI bus, which is connected to other system components by a special multimedia bridge ( Multimedia Bridge).

The paradox is that video cards (more precisely, their manufacturers) still prefer to have more memory, and almost no one stores textures in RAM. Firstly, so far (but only for now) modern applications do not use textures that are so large in size that would require too much memory. Secondly, video memory is quickly becoming cheaper and its increase does not greatly affect the cost of the video card (now a card with 64 Mb costs almost the same as just a year and a half ago a similar card with 32 Mb of memory cost). Although the main reason, obviously, is that system RAM is much slower than local video memory, and it would hardly be rational to use everything that AGP can provide, even if this reduces the price of the video adapter. However, all modern video cards have an AGP interface, because, firstly, even if you do not use texture pumping between the system memory and the video adapter, when there is a heavy load on the PCI bus from the periphery, data from various devices (for example, a processor or video editing board) may not be able to reach the video card as quickly as needed, and secondly, rapidly developing 3D graphics technologies may soon lead to the fact that textures will no longer fit into local video memory (unless, of course, the system has not the most sophisticated video card installed with a large amount of RAM). And then, if you take into account the power of modern CPUs, the PCI bus with its 132 megabytes per second looks very weak even for simple exchange data from the video controller with the central processor and other system components, so the appearance of AGP was really in demand at one time, and now it is simply impossible to imagine a modern personal computer without this interface.

So, let's start from the very beginning, that is, with AGP 1.0. The bus has two main operating modes: Execute And DMA. In DMA mode, the main memory is the card memory. Textures are stored in system memory, but are copied to the map's local memory before use. Thus, the AGP acts as a rear structure that ensures timely delivery of "cartridges" (textures) to the "front edge" (local memory). The exchange is carried out in large sequential packets.

In Execute mode, local and system memory for the video card are logically equal. Textures are not copied to local memory, but are selected directly from the system one. Thus, one has to select relatively small randomly located pieces from memory. Since system memory is allocated dynamically, in blocks of 4 KB, in this mode, to ensure acceptable performance, it is necessary to provide a mechanism that maps sequential addresses to real addresses of 4 KB blocks in system memory. This difficult task is accomplished by using a special table ( Graphic Address Re-mapping Table or GART) located in memory.

The AGP bus fully supports PCI bus operations, so AGP traffic can be a mixture of alternating AGP and PCI read/write operations. AGP bus operations are separate. This means that the request for the operation is separated from the actual transfer of data. This approach allows the AGP device to generate a request queue without waiting for the current operation to complete, which also improves bus performance.

In 1998, the AGP bus specification was further developed - Revision 2.0 was released. As a result of the use of new low-voltage electrical specifications, it became possible to perform 4 transactions (data block transfers) in one 66-MHz clock cycle (AGP 4x), which gives throughput buses at 1Gb/s. The only thing that is missing for complete happiness is that the device can dynamically switch between 1x, 2x and 4x modes, but, on the other hand, no one needs this.

However, the needs and demands in the field of video signal processing are increasing, and Intel has prepared a new specification - AGP Pro - aimed at meeting the needs of high-performance graphics stations. The new standard does not change the AGP bus. The main direction is to increase the power supply of graphic cards. For this purpose, new power lines have been added to the AGP Pro connector.

Generally speaking, there are two types of AGP Pro cards - High Power And Low Power. High Power cards can consume from 50 to 110 W. Naturally, such cards need good cooling. To this end, the specification requires two free PCI slots on the component side (the side on which the card's main chips are located).


Moreover, these slots can be used by the card as additional mounts, for supplying additional power, and even for exchange via the PCI bus. However, minor restrictions are imposed on the use of these slots:

  • Do not use to power the V I/O line
  • Do not set the M66EN line (pin 49V) to GND (which is quite natural, since this puts the PCI bus in 33 MHz mode)
  • The PCI I/O subsystem should be designed for a voltage of 3.3V with the ability to operate at 5 V
  • No 64-bit or 66 MHz support required

Low Power cards can consume 25-50 W, so the specification only requires one free PCI slot to provide cooling.


Moreover, all retail AGP Pro cards must have a special overlay with a width of 3 or 2 slots, respectively, because of this the card takes on a rather intimidating appearance.

Naturally, you can install regular AGP cards into the AGP Pro connector.


Somewhere from the beginning of 2001, AGP Pro slots began to replace regular AGP on most serious motherboards - manufacturers, apparently, began to believe that it was worthless to make expensive products without supporting the latest trends in the field computer technology. But there are not so many video cards themselves that would require this connector. For example, after looking at the price lists of several very reputable companies that sell computer components, I still did not see a corresponding mark anywhere next to the name of the video card. However, this is not surprising, since the new specification is designed primarily for professional graphics stations, and not for an ordinary consumer PC (which, in fact, is discussed on the pages of this site). Although, on the other hand, it can be assumed that after some time ordinary “custom” cards will begin to be actively produced, since with the increasing power of video chips and the increase in the current they consume, such solid cooling and power supply may indeed be required - after all, they are now hanging on Some video cards have almost one-kilogram radiators with fan blades like those of a helicopter, and these video cards often cannot be made to work any normally with cheap power supplies with a power of less than 250 VA (in connection with this, by the way, a solution was even somehow come up with to equip board with its own external power supply). The thought creeps in that someday computers will be sold complete with a portable nuclear power plant, and they will use a liquid cooling system! Again, we'll wait and see.

The AGP standard was developed by Intel in order to, without changing the existing standard for the PCI bus, speed up data input/output to the video card and, in addition, increase computer performance when processing three-dimensional images without installing expensive dual-processor video cards with large amounts of video memory, as well as memory for textures, z-buffer, etc. This standard was supported by a large number of companies included in the AGP Implementors Forum, an organization created on a voluntary basis to implement this standard. Starter version standard - AGP 1.0.

Design:

    A separate slot with 3.3 V power supply, reminiscent of a PCI slot, but in fact in no way compatible with it. A regular video card cannot be installed in this slot and vice versa.

Work principles and the main advantages of AGP compared to PCI:

1. Physical characteristics of AGP compared to PCI

    The data transfer speed is up to 532 Mb/s, which is due to the AGP bus frequency of 66 MHz, the ability to cancel the multiplexing mechanism of the address and data bus (on PCI, the address is first issued over the same physical lines, and then the data). The PCI bus has a clock speed of 33 MHz and 32 bits of data, so it can handle 33,000,000 x 4 bytes = 132 Mb/s. AGP has a bus frequency of 66 MHz and the same bit depth, and in standard mode (more precisely, “1x” mode) it can pass 66,000,000 x 4 bytes = 266 Mbytes/s. In x1 mode, the clock signal itself is used as a strobe. To increase the throughput of the AGP bus, the standard includes the ability to transmit data using additional special signals used as strobes, instead of the CLK signal in normal mode (these are “2x” and “4x” modes). In 2x mode, the throughput becomes 66,000,000 x 2 x 4 bytes = 532 Mbytes/s. In the "4x" mode (introduced in specification 2.0), the throughput increases accordingly, to 1064 Mbytes/s.

    In addition to the “classical” addressing method as on PCI - first the address is set, then data appears on the same buses, AGP can use the sideband addressing mode, also called “sideband addressing”, in which the address and data buses are separated and therefore can be transmitted simultaneously. The exchange speed in SBA mode increases significantly, since the time spent on transmitting an address over the bus is eliminated. In this case, special SBA address signals (not found in PCI) are used ( S ide B and A ddressing). The table below shows the 3DMark99 test results for ASUS video cards V3400 TNT 16 MB SGRAM with and without SBA mode enabled.

    Pipeline data processing on AGP as opposed to PCI. The figure below shows this clearly:

Picture 1. AGP vs PCI. After a delay, data appears on the PCI at the set address. On AGP, a packet of addresses is first set, to which a response with a data packet follows. (c) Intel Corporation

    Most 3D image processing is performed in the computer's main memory by both the central processor and the video card processor. The mechanism for accessing the video card processor to memory is called D.I. rect M emory E xecute (DIME - direct execution in memory). It should be mentioned that not all AGP video cards currently support this mechanism. Some cards currently only have a mechanism similar to the bus master on the PCI bus, i.e. DMA channels are used to quickly transfer data to the video card. This principle should not be confused with UMA (Unified Memory Architecture), which is used in inexpensive video cards, usually located on the motherboard (for example, SP97-V from ASUSTeK Computers). Main differences:

    • The area of ​​the computer's main memory that can be used by an AGP card (also called "AGP memory") does not replace screen memory. In UMA, the main memory is used as screen memory, and AGP memory only supplements it.

      Memory bandwidth in a UMA video card is less than that of the PCI bus.

Figure 2. Block diagram of interaction between an AGP card and a computer.

    For texture calculations, only the central processor and video card processor are involved.

    The CPU writes data for the video card directly to an area of ​​conventional memory, which is also accessed by the video card's processor.

    Only memory read/write operations are performed

    There is no arbitration on the bus (there is always one AGP port) and no time spent on it

2. Comparison of AGP and PCI video cards:

    In reality, an AGP card will outperform a regular card (if we compare cards with video processors of similar power) only in 3D image processing tasks that require a large amount of memory for textures (more than 8 Mb). You must understand that the computer's memory itself must be at least 32 MB, otherwise the AGP card will have nowhere to place textures.

    Tests of various cards carried out by Tom Pabst in the fall of 1997 showed that in conventional tests there is practically no difference between the currently available AGP cards and the Matrox Millenium II reference card. In three-dimensional tests there is a difference, but not very significant. Since then, a lot of water has flown under the bridge and the situation has changed significantly, as discussed below.

    Windows 95 OSR2 version 2.5 already fully supports AGP and the results of 3D tests for AGP are ahead of those for PCI, especially in scenes with large texture sets. You can see their results on the Tom Pabst website. Windows NT 4.0 does not support AGP, and only NT 5.0 (Windows 2000) will benefit from AGP.

    The AGP standard by itself does not guarantee performance gains. Only when the developer of a video card (more precisely, a video card processor) uses all the capabilities of the bus does this give a performance increase. For example, the Matrox Millenium II AGP video card does not support both DIME and "2x" mode, so it is almost impossible to find an application under which the AGP version of this video card will somehow be superior to the PCI version.

    An AGP video card can significantly outperform the same PCI video card only if it uses either DMA and x2, or DIME and x2. In modes without x2 there is practically no winning. You can check in what mode the video card in your computer is running using a small program pcilist, which can be copied from the EnTech Taiwan website.

Development of AGP

1.AGP 2.0

In December 1997, Intel released a preliminary version of the AGP 2.0 standard, and in May 1998 the final version. Main differences from previous version:

    The transfer speed can be doubled compared to 1.0 - this mode is called "4x" - and reach a value of 1064 MB/s.

    The address transmission speed in the "sideband addressing" mode can also be doubled

    Added "quick write" mechanism F ast W rite( FW). The main idea is to write data/control commands directly to the AGP device, bypassing intermediate data storage in the main memory. For elimination possible errors a new signal has been introduced into the bus standard WBF# (W rite B uffer F ull - the write buffer is full). If the signal is active, FW mode is not possible.

The first video cards supporting version 2.0 appeared at the end of April 1999. By appearance AGP video card connector can easily determine the presence of such support.

View of the video card connector with AGP 1.0

View of the video card connector with AGP 2.0

As can be seen from the photographs, the connectors differ in design by having an additional slot for AGP 2.0. Since the corresponding connector on the motherboard will have a plastic strip under the second slot, a board with AGP 1.0 cannot be installed in such a slot, but vice versa - without any problems.

2.AGP Pro

In July 1998, Intel released version 0.9 of the AGP Pro specification, which differs significantly in design from AGP 2.0. The brief essence of the differences is as follows:

    The AGP connector has been changed - pins have been added along the edges of the existing connector for connecting additional 12V and 3.3V power circuits

    Compatible with AGP 2.0 only from bottom to top - boards with AGP 2.0 can be installed in the AGP Pro slot, but not vice versa.

    AGP Pro is intended only for systems with the ATX form factor. Installation of AGP Pro boards in the NLX system is not provided (the size of the board in AGP Pro is too large).

    Since the AGP Pro card is allowed to consume up to 110 Wt (!!), the height of the elements on the board (including possible cooling elements) can reach 55 mm, so two adjacent PCI slots must remain free. In addition, two adjacent PCI slots can be used by the AGP Pro board for its own purposes.

    From a circuit design point of view, the new specification does not add anything other than special pins that inform the system about the consumption of the AGP Pro board.

The figure shows that the dimensions of the AGP Pro slot evoke nostalgic memories of the late 80s, when the display controller board looked almost the same (although it was no more than one compartment thick). Of course, the specification for AGP Pro stipulates the maximum dimensions and current consumption, but after reading it, a seditious thought comes to mind - what does Intel now consider the main processor in a computer?

AGP 8X

In November 2000, Intel released a preliminary version (draft) of the next AGP bus variant - 8X. The main idea is to increase the bandwidth to 8x4=32 bytes per system bus clock cycle. This means that the data transfer rate on the bus will increase to 2 Gigabytes per second. How this happens can be seen from the figure below:

In addition, the design of the new bus version includes several fundamental changes that expand the capabilities of the AGP interface. Some of them can be listed:

    Reducing the signal voltage level on the bus

    Calibration cycles

    Dynamic bus inversion

    Support for isochronous data transfer mode

    Supports multiple AGP 8X ports (previously only one port was possible)

    New configuration registers for the 8X bus

What's next?

In fact, with the decreasing cost of synchronous SDRAM (and its variant, synchronous graphics memory SGRAM), as well as even faster DDR DRAM, the prospects for AGP are not as bright as they once seemed. The main goal pursued by Intel - creating a cheap equivalent to professional video cards with large amounts of local memory - becomes meaningless given the low cost of memory. The bandwidth in AGP 2.0 standard boards (1 GB/s), which are yet to appear, is 2 times less than the actual current bandwidth for local SGRAM memory, reaching 2 GB/s. Therefore, increasing the clock frequency and PCI bus width can negate all the advantages of AGP.
Another thing is that AGP has become virtually the only interface for video cards, and only this fact makes it almost impossible to switch back to PCI, so AGP will continue to develop, but in parallel with the development of PCI.

Accelerated Graphics Port (AGP) - Accelerated graphics port

In order, without changing the already established standard for the PC1 bus, to speed up data input/output to the video adapter and, in addition, to increase PC performance when processing three-dimensional images without installing specialized expensive dual-processor video adapters, in 1997 Intel developed a standard for the AGP bus ( Accelerated Graphics Port). AGP is a data transfer channel between video adapters and RAM memory, as well as the processor system bus, without intersecting with the PC1 bus.

Note Due to problems with compatibility of video cards with various AGP specifications, which in severe cases caused the motherboard and video adapter to burn out, the AGP bus is not used in new developments.

The AGP bus is a high-speed local I/O bus designed exclusively for video system needs. It connects the video adapter (ZO accelerator) with the PC system memory, so there is only one AGP connector (slot) on the motherboard. Since the AGP bus is used by only one device, the arbitration problem characteristic of the PC1 bus does not arise (when several devices simultaneously require access to the bus), which increases the speed of data exchange between the video adapter and system memory.

The AGP bus was developed based on the PC1 bus architecture, so it is also 32-bit.

At the same time, it has a number of important differences from the PCI bus, which make it possible to increase the throughput several times.

Using higher clock speeds.

Demultiplexing (SBA mode).

Packet data transfer.

Direct in-memory execution (DiME) mode.

Operating modes If the PCI bus in its standard version (32-bit) has a clock frequency of 33 MHz, which theoretically provides the PCI bus bandwidth

Rice. 5.4. Block diagram of a video system based on the AGP bus

33 - 32 = 1056 bps = 132 MB/s. then the AGP bus is clocked with a signal with a frequency of 66 MHz. therefore, its throughput is 66 - 32 = 264 MB/s (this corresponds to the so-called 1P mode). In addition to mode 1 - . The AGP Revision 1.0 standard provides 2D mode. in which data is transmitted not only on the leading, but also on the falling edge of the clock pulse. In 2D mode, the equivalent clock speed is 132 MHz. and the throughput is 528 MB/s.

IN latest versions AGP buses. using a reduced supply voltage, more than two can be completed in one synchronization cycle. and four or eight gears (modes 4P and 8).

In the most general terms structural scheme AGP-based video systems can be represented as follows. as shown in fig. 5.4.

Structurally, the AGP connector resembles a PCT slot. however, it is slightly higher because the pins in the AGP connector are arranged in two layers. Depending on the supported supply voltage, there are several types of AGP slots. Cards that support modes usually have a universal connector with two slots (Fig. 5.5).


Rice. 5.5. Universal AGP bus connector on the video adapter

PC Interfaces

Intel, noticing that a further increase in the overall performance of a personal computer “rests” on the video subsystem, at one time proposed to allocate a separate AGP (Accelerated Graphics Port) interface bus for transmitting the video data stream. This standard quickly replaced the previously existing interfaces used by video cards: ISA, VLB and PCI.
The main advantage of the AGP bus is its high throughput. If ISA bus allowed transfers of up to 5.5 MB/s, VLB - up to 130 MB/s, and PCI - up to 133 MB/s, then the AGP bus theoretically has a peak throughput of up to 1066 MB/s (in the transfer mode of four 32-bit words) .
Intel developed the AGP interface to solve two main problems associated with the processing characteristics of 3D graphics on personal computer. Firstly, 3D graphics requires allocating as much memory as possible to store texture data and the Z-buffer. The more texture maps available for 3D applications, the better the picture looks on the monitor screen. Typically the Z-buffer uses the same memory as the textures. Video controller developers previously had the opportunity to use regular RAM to store information about textures and the Z-buffer, but the PCI bus bandwidth was a serious limitation. PCI bandwidth was found to be too low for real-time graphics processing. This problem Intel company solved by introducing the AGP bus standard. Secondly, the AGP interface provides a direct connection between the graphics subsystem and RAM. Thus, the requirements for real-time 3D graphics output are met and, in addition, frame buffer memory is used more efficiently, thereby increasing the processing speed of 2D graphics.
In reality, the AGP bus connects the graphics subsystem to the system memory management unit, sharing access with the computer's central processor. The only type of device that can be connected via AGP is graphics cards. At the same time, video controllers built into motherboard and using the AGP interface are not subject to upgrade.

For the AGP controller, the specific physical address at which information is stored in RAM does not matter. This is the key decision new technology, providing access to graphic data as a single block, regardless of the physical “scattering” of information across memory blocks. In addition, AGP operates at system bus frequencies up to 133 MHz.
The AGP specification is actually based on the PCI version 2.1 standard, but differs from it in the following main features:
the bus is capable of transmitting two (AGP 2x), four (AGP 4x) or eight (AGP 8x) data blocks in one cycle;
multiplexing of address and data lines has been eliminated;
Pipelining read/write operations eliminates the impact of delays in memory modules on the speed of operations.

The AGP bus operates in two main modes: DIME (Direct Memory Execute) and DMA (Direct Memory Access). In DMA mode, the main memory is the memory on the card. Textures can be stored in system memory, but are copied to the local memory of the video card before use. Thus, the AGP interface acts as a “cartridge carrier” (textures) to the “firing position” (local memory). The exchange is carried out in large sequential data packets. In Execute mode, local and system memory for the video card are logically equal. Textures are not copied to local memory, but are selected directly from the system one. Thus, it is necessary to transmit relatively small randomly located pieces. Since system memory is also required by other devices, it is allocated dynamically in 4 KB blocks. Therefore, to ensure acceptable performance, a special mechanism is provided that maps sequential addresses to real addresses blocks in system memory. This task is performed using a special table (Graphic Address Re-mapping Table or GART) located in memory. Addresses outside the GART range are not changed and are directly mapped to system memory or device specific range. The exact specification for the operating rules of GART is not defined, and the specific solution depends on the control electronics of the video card.
AGP bus operations are split. This means that the request for the operation is separated from the actual transfer of data. This approach allows the AGP device to generate a request queue without waiting for the current operation to complete, which also improves bus performance.
Version AGP 2.0, thanks to the use of low-voltage electrical specifications, allows for four transactions (data block transfers) per clock cycle (AGP 4x mode - quadruple multiplication). In 2003, video cards with the AGP interface version 3.0 (often referred to as AGP 8x) went into mass production. A twofold increase in throughput was achieved by increasing the bus clock frequency to 66 MHz and using a new signal level of 0.8V (in AGP 2.0 the 1.5V level was used). Thus, while maintaining the basic parameters of the interface, it was possible to increase the bus throughput to approximately 2132 MB/s. Although the connector remains the same, mechanically compatible with AGP 2.0, its electrical characteristics have changed due to lower voltage on the signal lines. Currently, on modern platforms, the AGP bus is being replaced by the PCI Express serial bus.